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38th GI/ITG International Conference on Architecture of Computing Systems

Keynote by Lukas Esterle: Digital twins for organic computing systems

Abstract

Organic computing systems are defined by their ability to adapt to changing environments and interact with other systems at runtime. Typical characteristics of such systems are their ability to self-organize, self-configure, self-optimize, and self-heal. For all these concepts, models are required for the systems to understand, analyse, and potentially predict their actions and respective consequences. In recent years, the idea of Digital Twins has gained significant interest from the research community. In this keynote, we will first discuss the differences between models, Digital Shadows, and Digital Twins. We will explore how we can employ Digital Twins and Digital Shadows in autononous and organic computing systems and discuss their potential benefits. Afterwards, we will also discuss the different challenges we are facing with employing Digital Twins and operating them on various computing hardware, how to deal with uncertainties, or changing and adapting systems and respective underlying models at runtime.

Bio

Lukas Esterle is an Associate Professor at Aarhus University, Denmark where he leads the research group on Autonomous Intelligent Systems. He received his PhD (with distinction) from the University of Klagenfurt, Austria. He has also been a postdoctoral researcher at TU Wien, Austria, and a Marie Skłodowska-Curie Fellow at Aston University, Birmingham, UK. Furthermore, he is an associate editor for the ACM Transactions on Adaptive and Autonomous Systems journal and the Journal on Ambient Intelligence and Smart Environments. His research interest is on facilitating interaction among autonomous (cyber-physical) systems through individual and mutual learning, self-awareness, and computational trust.

 

Keynote by Filippo Mantovani: Prototyping non-conventional architectures for HPC: some failure, a few successes, and several byproducts

Abstract

Over the past two decades, CPU-centric architectures—dominated primarily by x86—have been the cornerstone of high-performance computing (HPC). However, this dominance has faced challenges from several disruptive, non-traditional technologies. The IBM Cell processor and GPUs, initially driven by the gaming market, represent notable examples. While the IBM Cell processor eventually faded, GPU computing thrived and now powers many of the world’s top supercomputers.
Similarly, the rise of Arm CPUs, originally designed for smartphones and tablets, marked another paradigm shift. Between 2010 and 2015, Arm architectures demonstrated increasing computational capabilities, culminating in the debut of the first Arm-based supercomputer in the TOP500 in 2018. By 2020, Fugaku, powered by Fujitsu's Arm-based CPUs, secured the top spot in the TOP500 rankings. More recently, geopolitical factors have accelerated investments in RISC-V architectures, with Europe and other regions exploring their potential for HPC.
While contributing to the Mont-Blanc and EPI projects, I have been leading the prototyping efforts for pushing both Arm and RISC-V into HPC. This talk offers a personal, biased, and occasionally unfair reflection on the challenges, failures, and successes encountered while prototyping with non-conventional HPC technologies over the past decade. Along the way, we will also explore the unexpected byproducts and insights that have emerged from these endeavors.

Bio

Filippo Mantovani is an established researcher leading the Mobile and Embedded-based HPC group at the Barcelona Supercomputing Center (BSC). He holds a Ph.D. in Computer Science from the University of Ferrara, Italy, and has worked as a scientific associate at DESY in Zeuthen, Germany, and the University of Regensburg, Germany. His career has focused on computational physics and high-performance computing, contributing to projects like Janus, QPACE, and Mont-Blanc. Currently, he is involved in the FPGA prototyping tasks of RISC-V-based accelerators within the European Processor Initiative (EPI) and leads the collaboration between BSC and Etxe-tar to optimize high-throughput manufacturing systems.