The GI/ITG International Conference on Architecture of Computing Systems (ARCS) conferences series has over 37 years of tradition reporting leading edge research in computer architectures and operating systems. This year, the conference has a special focus on: "HPC - Challenges for Sustainable Computing"

New chips for high‑performance computing (HPC) are being developed in and outside Europe (e.g. ARM processors for HPC, RISC‑V chips, special purpose ASIC designs, etc.) and even disruptive technologies such as QPU accelerators are being connected to HPC systems. New chips are designed either as general purpose devices with a wide user portfolio in mind, or target the needs of specific applications (e.g. machine learning pipelines or deep learning workloads, mobile or embedded systems). Accordingly, they might rely on well established architectural approaches (CPU‑like, vector‑extensions), or bring completely new disruptive ideas, always with the aim of limiting energy consumption. When these are integrated in HPC systems, the overall system design becomes more and more heterogeneous. These increasingly complex architectures require optimizations in application code. Further, porting HPC code to new architectures is an important challenge.

Beside the conference main theme, the ARCS’25 conference welcomes all contributions on hardware architectures, as well as their programming models, software stacks (operating systems, compilers...), their insertion into computing systems, and the challenges to port optimized code:

• Hardware Architectures
  • Reconfigurable architectures
  • System‑on‑chip
  • Distributed systems
  • High performance systems
  • Heterogeneous multi‑& many‑core architectures
  • Hybrid CPU‑GPU and CPU‑QPU architectures
  • HPC‑workload specific accelerator architectures
  • Architectures for real‑time and mixed‑criticality systems
  • Coarse‑/fine‑grained reconfigurable architecture
  • Flexible I/O support
  • Using new non‑volatile memory for energy‑efficient architectures
  • New smart network technologies (e.g. Smart‑NICs, SmartSwitches)
  • Advanced computing architectures

• Programming Models and Runtime Environments
  • Programming on novel HPC chip architectures
  • HPC programming models for heterogeneous computing
  • Hybrid CPU‑QPU programming and experiments
  • Tools to monitor and to optimize the power consumption of HPC architecture
  • Operating systems, programming models, algorithms, and data structures for heterogeneous HPC architectures
  • Operating systems, hypervisors and middleware for homogeneous and heterogeneous multi‑/many‑core computing platforms
  • System management including but not limited to scheduling, memory management, power/thermal management, and RTOS
  • Domain‑specific languages and programming models
  • Architecture specific code generation/optimization
  • Architectural simulation

• Cross-sectional Topics
  • Near-memory and in-memory computing
  • Memory and network compression technologies
  • Organic computing
  • Pervasive systems
  • Autonomous systems
  • Approximate Computing
  • Mixed-criticality systems
  • Support for safety and security
  • Hardware in the loop simulations
  • Optimization and performance analysis